An 8-b, 1.8 V, 20 MS/s analog to digital converter

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An 8-b, 1.8 V, 20 MS/s analog to digital converter

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dc.contributor.author Beck, Douglas R en_US
dc.date.accessioned 2009-10-06T00:18:09Z
dc.date.available 2009-10-06T00:18:09Z
dc.date.issued 2002 en_US
dc.identifier.other b48542829 en_US
dc.identifier.other 51636662 en_US
dc.identifier.other Thesis 51714 en_US
dc.identifier.uri http://hdl.handle.net/1773/6050
dc.description Thesis (Ph. D.)--University of Washington, 2002 en_US
dc.description.abstract Ever increasing market-driven demand for System-on-a-Chip (SOC) integration means that analog and RF circuits should operate along side their digital counterparts at low voltage levels with low power dissipation, high manufacturing yield, high noise immunity, and few, if any, off-chip components. Specific design practices and circuit techniques are used to achieve these goals. Utilizing simple low-gain amplifiers and calibration techniques, maximum converter bandwidth and minimum power consumption are achieved. Errors introduced by circuit techniques and non-ideal effects are compensated through smart design and digital error correction. The resulting ADC is conducive to system integration without trading off circuit performance and also alleviates the need for special circuit considerations such as separate power supplies or external circuit components. en_US
dc.format.extent vii, 113 p. en_US
dc.language.iso en_US en_US
dc.rights.uri en_US
dc.subject.other Theses--Electrical engineering en_US
dc.title An 8-b, 1.8 V, 20 MS/s analog to digital converter en_US
dc.type Thesis en_US


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