Power and area optimization techniques for ultra-wideband millimeter-wave CMOS transceivers
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Over the past decade, opportunities for utilizing the broadband spectrum available at millimeter-wave (mm-wave) frequencies has motivated research on both short and long-range, highly-integrated complementary metal oxide semiconductor (CMOS) transceivers. Prototype mm-wave CMOS transceivers have been demonstrated for application in high-speed data transfer (57-64 GHz), wireless back-haul (71-76 GHz), automotive radar (77GHz) and medical imaging (90 GHz) systems. However, in spite of promising results, large scale deployment of mm-wave CMOS transceivers in portable and hand-held electronics is currently hindered by front-end power-consumptions on the order of several watts. Moreover, as a first order approximation, power consumption is directly proportional to system bandwidth. Therefore, as the bandwidth requirements of systems increase, the challenge with on-chip power consumption will become increasingly difficult to solve. In this dissertation, techniques for optimizing the power and area of ultra-wideband millimeter-wave transceivers are described. This work resulted in the fabrication of three mm-wave integrated circuits (IC), all of which were realized in a 6-metal layer 40-nm CMOS process. The first IC is a multi-stage transformer-feedback based 11-to-13 GHz direct-conversion receiver. The device achieves a 16% fractional-bandwidth, a peak power-gain of 27.6dB, and noise-figure of 5.3dB while consuming 28.8mW from a 0.9V supply. Second, a compact 24-54GHz 2-stage bandpass distributed amplifier utilizing mirror-symmetric Norton transformations to reduce inductor component values allowing efficient layout to occupy an active area of 0.15mm <super>2</super>. The device has a 77% fractional-bandwidth, an overall gain of 6.3dB, a minimum in-band IIP3 of 11dBm, while consuming 34mA from a 1V supply. The third, and the IC which includes the most integration among the three, is an ultra-broadband single-element heterodyne receiver intended for use in low-power phased-array systems. The receiver maintains 17GHz of bandwidth from the mm-wave front end, through a high-IF stage, and to the baseband output. The device occupies 1.2mm <super>2</super> and exploits properties of gain-equalized transformers throughout the signal path to achieve an overall 17GHz bandwidth 20dB gain with a flat in-band response, 7.8dB DSB NF, and a P <sub>-1dB</sub> of -24dBm, while consuming 104mW off a 1.1V supply.
- Electrical engineering