Show simple item record

dc.contributor.advisorStiber, Michael
dc.contributor.authorNigam, Hemant
dc.date.accessioned2018-04-24T22:16:45Z
dc.date.submitted2018
dc.identifier.otherNigam_washington_0250O_18302.pdf
dc.identifier.urihttp://hdl.handle.net/1773/41727
dc.descriptionThesis (Master's)--University of Washington, 2018
dc.description.abstractEmbedded platforms with integrated graphics processing units (GPUs) are popular choices, for use-cases, like Autonomous machines, to run the Deep Neural Networks (DNNs) inference workload. However, due to a rapid increase in data volume, DNN inference is becoming even more computationally intensive and memory sensitive, which necessitates a mechanism for improving DNN inference efficiency on existing embedded systems. This Master’s thesis investigates the memory sensitivity of DNN inference – specifically, the impact of off-chip memory (DRAM) contention on DNN inference performance. It demonstrates a prototype GPU aware memory isolation mechanism: a locking mechanism in the GPU driver to reduce DRAM contention caused by multicore CPUs, thus improving DNN inference efficiency. Experiments performed on a Jetson TX2 board running the Linux4Tegra OS shows the benefits of our proposed mechanism, with up to 13.5% speedup of a micro-benchmark and up to 41% and 86% speedup of two object detection benchmarks.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.rightsnone
dc.subjectDeep Neural Network
dc.subjectDRAM
dc.subjectEdge Computing
dc.subjectGPU Acceleration
dc.subjectInference
dc.subjectComputer science
dc.subject.otherTo Be Assigned
dc.titleKernel Mechanisms for Efficient GPU Accelerated Deep Neural Network Inference on Embedded Devices
dc.typeThesis
dc.embargo.termsRestrict to UW for 5 years -- then make Open Access
dc.embargo.lift2023-03-29T22:16:45Z


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record