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dc.contributor.authorBeck, Douglas Ren_US
dc.date.accessioned2009-10-06T00:18:09Z
dc.date.available2009-10-06T00:18:09Z
dc.date.issued2002en_US
dc.identifier.otherb48542829en_US
dc.identifier.other51636662en_US
dc.identifier.otherThesis 51714en_US
dc.identifier.urihttp://hdl.handle.net/1773/6050
dc.descriptionThesis (Ph. D.)--University of Washington, 2002en_US
dc.description.abstractEver increasing market-driven demand for System-on-a-Chip (SOC) integration means that analog and RF circuits should operate along side their digital counterparts at low voltage levels with low power dissipation, high manufacturing yield, high noise immunity, and few, if any, off-chip components. Specific design practices and circuit techniques are used to achieve these goals. Utilizing simple low-gain amplifiers and calibration techniques, maximum converter bandwidth and minimum power consumption are achieved. Errors introduced by circuit techniques and non-ideal effects are compensated through smart design and digital error correction. The resulting ADC is conducive to system integration without trading off circuit performance and also alleviates the need for special circuit considerations such as separate power supplies or external circuit components.en_US
dc.format.extentvii, 113 p.en_US
dc.language.isoen_USen_US
dc.rightsCopyright is held by the individual authors.en_US
dc.rights.urien_US
dc.subject.otherTheses--Electrical engineeringen_US
dc.titleAn 8-b, 1.8 V, 20 MS/s analog to digital converteren_US
dc.typeThesisen_US


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