FPGA-Accelerated Machine Learning Inference for Real-Time RHEED Analysis Towards Closed-Loop PLD

Abstract

Real-time machine learning inference at high frame rates is challenging when target latencies fall in the millisecond range and host-side processing introduces transfer overhead. This thesis presents an FPGA-accelerated inference framework that performs end-to-end image analysis directly on a frame grabber and is validated on Reflection High-Energy Electron Diffraction (RHEED) imagery acquired during Pulsed Laser Deposition (PLD). The designed analysis pipeline consists of two sequential learned stages. FOLO, a YOLO-inspired convolutional network, localizes two-dimensional Gaussian diffraction features and produces a probability map that is reduced to discrete detections by a physics-informed non-maximum suppression algorithm. Gaussian, a LeNet-inspired convolutional network, regresses the six parameters defining each detected spot's profile and is trained without labels using a reconstruction-based loss. The complete pipeline is synthesized into the CustomLogic partition of a Euresys Coaxlink frame grabber targeting a Kintex UltraScale XCKU035 FPGA. The deployed system achieves an end-to-end latency of 4.1 ms and a sustained throughput of 244 frames per second, comfortably below the 10--100 ms monolayer formation timescale.