Hephaestus: Solving the Heterogeneous, Highly Constrained Analog Placement Problem

Abstract

The purpose of this research was to investigate alternative methods for placement of highly constrained, heterogeneous architectures. Because of certain constraints on these architectures, traditional methods for placement cannot be applied directly. This thesis discusses those traditional methods that were considered but ruled out for various reasons. A unique simulated annealing solution was developed which simultaneously places and routes designs. The research then examined different move sets and cost metrics used with the annealer which directly affected the ability to successfully place and route. By treating signal to wire assignment as a placement operation, the annealer was able to perform routing integrated during placement. In this formulation the grade of a placement was the weight of the minimum spanning trees (or alternatively steiner tree approximations) constructed over the current signal to wire assignment graph. A working implementation of this tool, Hephaestus, was finally tested against several designs with the goal of finding the best move set and cost metric combination while gauging the viability of such a tool. The author finds that the tool is capable of successful architecture adaptive placement. After placement, verification showed that designs placed by Hephaestus could be successfully routed.