An 8-b, 1.8 V, 20 MS/s analog to digital converter

Abstract

Ever increasing market-driven demand for System-on-a-Chip (SOC) integration means that analog and RF circuits should operate along side their digital counterparts at low voltage levels with low power dissipation, high manufacturing yield, high noise immunity, and few, if any, off-chip components. Specific design practices and circuit techniques are used to achieve these goals. Utilizing simple low-gain amplifiers and calibration techniques, maximum converter bandwidth and minimum power consumption are achieved. Errors introduced by circuit techniques and non-ideal effects are compensated through smart design and digital error correction. The resulting ADC is conducive to system integration without trading off circuit performance and also alleviates the need for special circuit considerations such as separate power supplies or external circuit components.