Low noise design techniques for radio frequency integrated circuits

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Low noise design techniques for radio frequency integrated circuits

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Title: Low noise design techniques for radio frequency integrated circuits
Author: Li, Xiaoyong, 1975-
Abstract: Wireless communication has experienced explosive growth world-wide in the last decade and its huge market potential is driving relentless efforts in the information industry to improve the performance of wireless communication systems. Academia has also witnessed a flourish of research activities in communications, digital signal processing and radio frequency integrated circuit design.A major objective of wireless communication is the need to operate in hostile environments while achieving accurate transmission and reception of information, in which one of the great challenges is achieving sufficient fidelity in the presence of "unwanted signals" such as noise and interference nearby. For example, the ubiquitous thermal noise in electronic circuits degrades the signal-to-noise ratio (SNR) of received signals. In this dissertation this critical issue is addressed in the development of low-noise design techniques for radio frequency integrated circuits. Although the discussion is focused primarily on Complementary Metal Oxide Semiconductor (CMOS) technology, some of the techniques described in the thesis are also applicable to bipolar junction transistor (BJT) technologies.Low-noise amplifier (LNA) is a critical amplification stage in the on-chip portion of a receiver chain, which requires low noise and high gain. In this dissertation, a novel gm-boosted common-gate LNA (CGLNA) architecture is proposed herein that exhibits lower noise figure with lower power consumption than the conventional CGLNA. It preserves the advantage of insensitivity to parasitics at input and is well suitable for high-frequency applications.The spectral purity of the local oscillator (LO) signal is of great importance since it directly affects the SNR of the down-converted signal. The LO signal is usually generated using a phase-locked loop (PLL) wherein the required voltage-controlled oscillator (VCO) is often the main source of phase noise. In this work, a novel differential Colpitts VCO and a quadrature VCO are proposed that result in lower phase noise and more robust start-up characteristics than previous approaches.In contrast to the belief that RF circuit design is a mature subject, this dissertation demonstrates that significant performance benefits are obtained with continued design innovations. With the aggressive scaling of CMOS technology, efforts in CMOS RF IC design will continue for many years into the future.
Description: Thesis (Ph. D.)--University of Washington, 2004
URI: http://hdl.handle.net/1773/6013

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