CHARACTERIZATION OF SNEAK PATH CURRENT EFFECT IN A PEDOT: PSS-BASED ReRAM CROSSBAR ARRAY

Abstract

This thesis presents an experimental characterization of resistive switching memory crossbar devices fabricated on glass substrates with a structure of Cu/PEDOT: PSS/Ag, with a particular focus on understanding the impact of sneak-path currents on the switching performances. Resistive memory cells, particularly in crossbar configurations, are widely considered as promising memory technology due to their scalability, high density, non-volatility, and low power consumption. However, despite these advantages, they are prone to sneak-path currents—unintended leakage through unselected cells—which pose a significant challenge to performance and reliability in dense memory arrays.In this work, I investigate how a ReRAM cell in a crossbar array responds to prolonged electrical stress by applying low-voltage cycling corresponding to a sneak-path conduction. The device has a PEDOT:PSS as a switching layer sandwiched between Cu bottom electrode and Ag top electrode. The width of the electrodes is 10 µm and the crossbar array space is 60 µm. This research elaborates how a resistive switching memory cell in a crossbar array degrades its performance under various biasing conditions. Three categories of electrical testing were conducted. First, cycling measurements under repeated ±2 V sweeps were used to assess endurance until hysteresis degradation. Devices showed stable switching behavior for up to 121 cycles, with well-defined LRS, HRS, and consistent Vset, Vreset values before breakdown. Second, voltage sweep experiments were designed to compare switching behaviors during an initial ±2 V sweep versus a final ±2 V sweep, following intermediate low-voltage steps from ±0.5 V to ±1.9 V. The results demonstrated that cumulative sneak-path conduction led to gradual hysteresis collapse and reduced switching margins. Finally, narrow-to-broad sweep testing evaluated whether limited low-voltage cycling could condition the device and influence future switching dynamics. Devices exposed only to narrow ranges remained non-switching, but subsequent full-range sweeps revealed altered I–V characteristics, confirming that sneak-path effects accumulate even in the absence of complete switching events.Overall, the findings highlight that while selector-less resistive memory cells offer structural simplicity and potential scalability, their performance degrades under repeated low-voltage stress because of sneak-path current. This study provides experimental insights into how cumulative leakage conduction paths affect long-term device reliability, informing future strategies for robust ReRAM integration in compute-in-memory and neuromorphic architectures.