Engineering Solutions to Scale Up Trapped-Ion System

Abstract

Trapped-ion quantum processors offer some of the lowest gate error rates among qubit platforms, encoding quantum information in ionic energy levels and entangling qubits via shared motional modes. Despite this maturity, scaling to large numbers of qubits while maintaining high-fidelity control remains a central challenge. This thesis addresses two key bottlenecks in laser-based trapped-ion systems: trap geometry and laser delivery. The first contribution is a quantitative framework for evaluating trap geometries with respect to scalability, applied to three electrode designs: a conventional surface trap, a ``gnd-surface'' multi-wafer trap, and a symmetric ``cross-rf'' multi-wafer trap. Multi-wafer designs, particularly the cross-rf trap, show substantial improvements in harmonicity, trap depth, radial trap frequency, and heating rate. However, the gnd-surface trap is identified as the most promising path to scaling due to its significantly simpler fabrication. The second contribution is the initial implementation of a photonic integrated circuit (PIC) for scalable laser delivery to ions. Operating at 729 nm, the PIC supports slow thermal tuning and fast nanosecond-scale modulation, with a pathtoward FPGA integration. Coupling of a frequency-stabilized laser into the PIC was demonstrated. Together, these contributions advance a modular architecture for trapped-ion quantum computation in which trap geometry and optical control are each independently engineered for large-scale operation.