CMOS Short Pulse Generator IC Development
| dc.contributor.advisor | Dawn, Debasis | |
| dc.contributor.author | Patel, Jabir Mohammad | |
| dc.date.accessioned | 2023-08-14T17:04:22Z | |
| dc.date.available | 2023-08-14T17:04:22Z | |
| dc.date.issued | 2023-08-14 | |
| dc.date.submitted | 2023 | |
| dc.description | Thesis (Master's)--University of Washington, 2023 | |
| dc.description.abstract | The objective of this project is to design, simulate, and characterize a Novel CMOS-based short pulse generator (SPG) that can generate a sub-nano second pulse width and capable of repetition while consuming less power. The CMOS Short Pulse Generator will be based on the Marx Generator topology but will use a combination of CMOS switches for fast switching to generate periodic short pulses. The specific objective of this project is to introduce innovative circuit architecture to achieve periodic pulses with fast rise times and short durations of sub-nanosecond while consuming less power compared to the existing state-of-the-art pulse generators. This research will aim to design and layout a fully integrated CMOS short pulse generator IC for fabrication and test a prototype built on breadboard and fabricated on PCB to validate the proof-of-concept. This research will contribute to advancing the state-of-the-art in pulse generator technology, with potential applications in various fields. | |
| dc.embargo.terms | Open Access | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.other | Patel_washington_0250O_25618.pdf | |
| dc.identifier.uri | http://hdl.handle.net/1773/50370 | |
| dc.language.iso | en_US | |
| dc.rights | none | |
| dc.subject | CMOS | |
| dc.subject | CMOS TSMC 180nm | |
| dc.subject | IC Development | |
| dc.subject | Short Pulse Generator | |
| dc.subject | Electrical engineering | |
| dc.subject.other | Electrical and computer engineering | |
| dc.title | CMOS Short Pulse Generator IC Development | |
| dc.type | Thesis |
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